RISKS

Uniform Temperature Assumptions Mismatched Length Scales Time Varying Temperature 3D IC
“We collaborated with Gradient on HeatWave, which is a full-chip transient electro-thermal simulator. Simulation results for a chip containing power transistors and temperature sensors, taken over a two second interval, correlated well with measured data.”

Yves Depret
DST Mixed Signal & Digital Flows Manager
ON Semiconductor

Risks of Assuming Uniform Temperature

The devices and interconnect within an IC consume power and dissipate heat, causing the temperature in the die to rise. Different portions of the die heat up at different rates, leading to temperature variations.

Chip designers usually estimate the average chip temperature at different operating corners, but assume that temperature is uniform across the die. Perhaps to simplify circuit simulation, or perhaps because of tool limitations, a single temperature is specified for the entire simulation. One might think that only small temperature differences (ΔT) can arise within a chip, since silicon is a relatively good thermal conductor.

Actually, the uncertainty in such assumptions can be quite large, because they are essentially guesses. High performance transistors can produce very high power densities, which cause temperature to rise unevenly within the die. Smaller form factors also make it harder to remove the heat. ICs now in production are known to sustain ΔT exceeding 25°C, with some even exceeding 100°C, across die, giving rise to performance degradations, circuit malfunctions, or even reliability problems.

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Few Analysis Options

When these temperature differences degrade performance or reliability, designers have poor visibility to debug the problem. Thermal imaging is available, but only after you have already built the chip, and it does not provide device-level resolution. Power analysis tools do not simulate temperature at the device or interconnect level, nor do package analysis tools. As a result, most temperature problems are handled through rules of thumb, design margins, expensive guesswork and mask revisions.

Risk Assessment

  • Does your analysis apply distinct temperatures to each circuit instance?
  • How well do your design margins cover thermal uncertainties?
  • What devices or circuits on this chip can be impacted by ΔT?
  • What problems would be masked by neglecting ΔT?
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